Tile Calorimeter Phase I

Go to Phase II documentation

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Mechanical Details
PMT Block
Motherboard for LV & Control Signals
HV Control & Distribution in the Drawer
Digitizer System
Readout Driver
Level 1 Trigger
Interface Board
External LV Supplies
Notes and Writeups
Software for 13bit Version of 3in1 Cards
Radiation Testing
Design Review
Production Readiness Review
Submodule Construction
Commissioning
Trigger Signals
Other Sites with TileCal Info

Software for 13bit Version of 3in1 Cards

Large EPLD in controller labeled CTR13,
V2.0 3in1 cards EPLD labeled V9b,
all v3.1 and later 3in1 cards

• Lynx Version
• OS9 Version